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Based on the proposed technique. a two stage power electronic system architecture has been proposed as shown in Fig. 5. The system comprises of a boost type dc–dc converter and an inverter to feed the power generated by PV array to the grid and grid connected loads. The system configuration shown in Fig. 5 is standard power system architecture available in standard literatures. This also elucidates that the APPSO algorithm can be mapped onto the standard power system architecture. We used MSP430FG4618 to implement the MPPT algorithm. The MSP430 incorporates a 16-bit RISC CPU. peripherals. and a flexible clock system that interconnect using a von Neumann common memory address bus (MAB) and memory data bus (MDB).
In the present application. a square wave of varying duty cycle has been generated using the microcontroller. This square wave drives the dc–dc buck converter. At regular intervals. we performed the MPPT algorithm and according to that the duty cycle of the output is varied. In our case. the required interval was 10 s. The interrupt capability of the timer has been used. The timer is initially started and continues with the generation of square wave. After specified interval CPU is interrupted by the timer and corresponding interrupt service routine (ISR) is invoked. The ISR is actually the MPPT algorithm based on an APPSO. After execution of the routine. new duty cycle is established and the system operates with the modified duty cycle. The DC–DC converter can be realized on the TMS320F280X DC–DC buck converter. For converting the analog current being sensed into the digital form to be understood by the microcontroller. an A D converter ADS1208 has been used.
