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A VLSI Architecture for Enhancing the Fault Tolerance of NoC using Quad-spare Mesh Topology and Dynamic Reconfiguration

In this paper. a VLSI architecture employing router-level redundancy. referred to as a quad-spare mesh. is proposed for fault tolerant NoC designs. This design deals with the problem that a faulty router breaks the communication between healthy PEs. The proposed design significantly improves a system’s reliability and its mean time …

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